9 chapters20 sections~40 real patents, linked

Inside the Datapath

What AMD's Cambridge networking team — Solarflare → Xilinx → AMD — actually builds, reconstructed from ~40 of their real patents. Kernel bypass and Onload, the ef_vi datapath, ultra-low-latency transmit, safe direct access, receive steering, selective offload, hardware timestamping, and the turn toward the SmartNIC/DPU. Written as interview prep for the role; every claim is anchored to a linked patent.

  1. 1🧭 The team & the thesis

    Who builds the fast path, why their patents are the clearest window into the work, and how to read your interviewer.

    Who builds the fast path · Why read their patents · Miklos Reiter, specifically

  2. 2🚀 Kernel bypass & the user-space stack

    Onload's core idea: host TCP in user space with direct NIC queues, not a TCP-offload engine — and the machinery that keeps it correct.

    The Onload model · Staying correct & transparent · Why locality, not just syscalls

  3. 3ef_vi & ultra-low-latency transmit

    The raw layer-2 datapath beneath ef_vi: descriptor rings and events, and the transmit tricks that shave nanoseconds.

    Rings, descriptors & events · PIO and cut-through PIO · Templates & deadlines

  4. 4🛡️ Safe direct access

    Direct user-space access to the NIC is only shippable if the hardware enforces what each process may do.

    What a queue may transmit · DMA protection & translation

  5. 5🎯 Receive steering & virtualization

    Getting each packet to the right queue, core, and cache line — across processes, guests, and CPUs.

    Filtering: flow to queue · Virtual RSS, placement & switching

  6. 6🧩 Selective offload — not a TOE

    Accelerate the common path near the NIC while keeping correctness-heavy transport state in host software.

    Splitting TCP host/device · Near-NIC messages & segmentation

  7. 7⏱️ Timestamping & capture

    Solarflare's finance/telecom edge: knowing exactly when a packet crossed the wire, and capturing every one at line rate.

    Wire-time timestamps & ordering · Line-rate capture

  8. 8🧠 From NIC to DPU

    The 2019–2025 turn: the same architects now build programmable data-plane computers, not just low-latency NICs.

    The SmartNIC / DPU turn

  9. 9🗣️ The interview playbook

    Turn the patent canon into talking points, smart questions, and an honest bridge from your own background.

    Talking points & questions · Bridging your CV